The Challenge of Multiple Devices
In a complex Z80 system, you might have several devices that need to interrupt the CPU (e.g., a timer, a keyboard controller, and a disk controller). If two devices signal an interrupt at the exact same time, the CPU needs a clear way to decide which one to service first. This is called priority resolution.
The Daisy Chain Protocol
The Z80 uses a hardware architecture called a Daisy Chain to resolve interrupt priority.
How it Works:
- Physical Wiring: The Z80’s interrupt signals (
IEI
- Interrupt Enable In, andIEO
- Interrupt Enable Out) are physically wired from one peripheral device to the next in a sequence. - Priority: The device physically closest to the Z80 on the chain has the highest priority.
- Acknowledgement: When the Z80 responds to an interrupt, the highest-priority device that requested the interrupt blocks the `IEO′ signal to all devices lower down the chain, preventing them from placing their interrupt vector on the data bus.
Servicing the Interrupt (The IM 2 Vector)
The Daisy Chain primarily works with Interrupt Mode 2 (IM 2). Once the highest-priority device has been identified:
- The Z80 performs an Interrupt Acknowledge cycle.
- The highest-priority device places its unique Interrupt Vector Byte (the low 8 bits of the vector table address) onto the data bus.
- The Z80 then reads the full 16-bit address from the vector table (as defined by the I register and the vector byte) and jumps to that specific device’s Interrupt Service Routine (ISR).
The Key Instructions
You, as the programmer, manage the Z80’s side of the interrupt process:
Setup Sequence:
DI ; 1. Disable interrupts globally
LD I, VECTOR_BASE ; 2. Set the Interrupt Vector Register (I)
LD SP, STACK_ADDR ; 3. Set the Stack Pointer
IM 2 ; 4. Set Interrupt Mode 2
EI ; 5. Enable interrupts globally (Now ready for Daisy Chain)
Interrupt Handling Rules
When writing an ISR, you must follow strict protocol to maintain the integrity of the Daisy Chain:
- RETI / RETN: The routine must end with
RETI
(Return from Interrupt) or `RETN′. These instructions signal the Z80 to restore the interrupt state and signal the peripheral devices that the processing is complete, effectively allowing lower-priority devices to respond if needed. - Context Save: The first instruction in the ISR must be
PUSH AF′ (or
EXX′) to save the CPU’s state, and the last instruction (beforeRETI′) must be a corresponding
POP′ to restore it.