The Interrupt Vector Table (IVT)
The Interrupt Vector Table (IVT) is a critical data structure used exclusively when the Z80 is operating in Interrupt Mode 2 (IM 2). It is a simple array of 16-bit addresses that tells the CPU exactly where to jump when a specific hardware device signals an interrupt.
How the IVT Address is Calculated:
- Base Address: The OS sets the Interrupt Vector Register (I) to point to the base (high byte) of the IVT.
- Hardware Vector: The interrupting hardware places an 8-bit value (the low byte of the address) on the data bus.
- Final Address: The Z80 combines the I register (High Byte) with the Hardware Vector (Low Byte) to form the 16-bit address of the IVT entry.
- Jump: The CPU reads the 16-bit address stored at the IVT entry and jumps to the device’s specific Interrupt Service Routine (ISR).
Structuring the IVT
The IVT must be aligned to a 256-byte boundary (e.g., C000H′,
D000H′) and consists of 128 consecutive 16-bit addresses (256 bytes).
IVT Entry (16-bit address): Each entry is 2 bytes long and holds the start address of the ISR for that specific hardware vector.
ORG D000H ; IVT starts at a 256-byte boundary (D0XXH)
IVT_TABLE:
DEFW ISR_DUMMY_HANDLER ; Vector for 00H
DEFW ISR_DUMMY_HANDLER ; Vector for 02H
DEFW TIMER_ISR_ADDR ; Vector for 04H (Example: Timer)
; ... (125 more entries follow)
Dynamic Vector Installation
The OS kernel must provide a routine for device drivers (or user programs) to dynamically install their ISR address into the correct IVT slot.
The Installation Routine (OS Function):
INSTALL_VECTOR:
; Assume A = Hardware Vector (00H to FEH, must be even)
; Assume HL = Address of the new ISR (The service routine code)
LD DE, IVT_TABLE ; DE ← Base address of IVT
LD C, A ; C ← Hardware Vector (Index)
; Add the index to the base (complex math)
; ... (Routine to calculate DE + A)
; DE now holds the address of the IVT entry slot.
LD (DE), L ; Write Low Byte of ISR address
INC DE
LD (DE), H ; Write High Byte of ISR address
RET
Final System Setup (Putting it all together)
The final steps of the kernel boot sequence (Part 52) involve setting up the IVT:
- Clear/Initialize IVT: Fill the entire IVT table with a jump to a single Dummy Handler (which reports an unhandled interrupt error).
- Set I Register: `LD I, HIGH(IVT_TABLE)′.
- Set Mode: `IM 2′.
- Enable: `EI′.
The system is now fully initialized and ready for any hardware interrupt to be safely channeled to its specific handler.