Hardware

The Spectrum’s Key I/O Port The ZX Spectrum is minimalistic, relying on just a few I/O ports to manage all peripherals (keyboard, display, cassette, and beeper). The Main Port: The most crucial I/O address is `FEH′ (254 decimal), which is used for both input and output control. I/O Port Decoding (The Trick) The Spectrum simplifies hardware design by only connecting I/O logic to the lowest bit (A0) and the highest byte (A8-A15) of the Z80’s 16-bit address lines. ...

Introduction to the Spectrum’s Memory Map The ZX Spectrum is a 48KB machine with a simple, fixed memory map. Understanding this map is crucial because the Z80 must interact with the screen and system variables at hardcoded addresses. The 64KB address space is divided into four main 16KB blocks: Address Range Size (KB) Content Usage 0000H - 3FFFH 16 KB System ROM Holds the BASIC interpreter and operating system kernel. 4000H - 7FFFH 16 KB Low RAM Holds the Display File (Screen + Attributes) and user data. 8000H - BFFFH 16 KB High RAM 1 General purpose user program space. C000H - FFFFH 16 KB High RAM 2 Used for user programs and the CPU Stack (grows downwards). The Display File (Screen Memory) The most important fixed addresses are those related to the screen, which resides in the low RAM area. ...

The Role of the Z80 SIO The Z80 SIO (Serial Input/Output) chip is a sophisticated peripheral that acts as a dual-channel UART (Universal Asynchronous Receiver/Transmitter). It handles all the complex timing, start/stop bit generation, and error checking for serial communication entirely in hardware. Advantage: The SIO makes robust serial communication (like RS-232, modem, or network) fast and reliable, saving the Z80 CPU thousands of cycles compared to software bit-banging (Part 40). ...

The Role of the Z80 CTC The Z80 CTC (Counter/Timer Circuit) is a dedicated peripheral chip that provides four independent channels (Channel 0 to 3), each capable of acting as a counter or a timer. This chip is crucial for relieving the Z80 CPU of the burden of running software timing loops (Part 15). Advantage: The CTC allows for precise, hardware-based timing that operates in the background, freeing the CPU to run main program logic. ...

The Role of the Z80 PIO The Z80 PIO (Parallel Input/Output) chip is a dedicated peripheral designed to relieve the Z80 CPU of the burden of managing complex, high-speed, general-purpose I/O. It provides two independent 8-bit ports (Port A and Port B), each configurable as input or output. Advantage: The PIO handles handshaking and interrupt generation entirely in hardware, saving CPU cycles. PIO Communication Ports The PIO chip occupies four consecutive I/O port addresses on the Z80 bus, typically accessed via OUT and IN instructions: ...

The Challenge of Multiple Devices In a complex Z80 system, you might have several devices that need to interrupt the CPU (e.g., a timer, a keyboard controller, and a disk controller). If two devices signal an interrupt at the exact same time, the CPU needs a clear way to decide which one to service first. This is called priority resolution. The Daisy Chain Protocol The Z80 uses a hardware architecture called a Daisy Chain to resolve interrupt priority. ...

The Challenge of Mass Storage Traditional Z80 systems used slow tape drives, but modern retro systems often use SD cards or CompactFlash for fast, reliable storage. The Z80 must communicate with these devices using a low-level protocol, typically SPI (Serial Peripheral Interface). The SPI Protocol (Simplified) SPI is a synchronous serial protocol that sends data one bit at a time over several dedicated lines controlled by I/O ports: Line Direction Purpose CLK Output The Clock signal (controls timing). MOSI Output Master Out, Slave In (Data sent from Z80 to SD card). MISO Input Master In, Slave Out (Data received by Z80 from SD card). CS Output Chip Select (Activates the specific SD card). Bit-Banging the SPI Signal Since the Z80 doesn’t have a native SPI controller, we must bit-bang the protocol entirely in software using fast I/O port writes and reads. ...

The Limitation: 64 KB Address Space The Z80 uses 16-bit address lines, meaning it can only directly address 64 kilobytes (65,536 bytes) of memory (from address 0000H to FFFFH). Since many systems (like the MSX or larger Spectrums) have $128$ KB or more of RAM/ROM, they must use Memory Banking to access it all. How Memory Banking Works Memory Banking is the technique of using an I/O port to physically switch which $16$ KB or $8$ KB block of memory is visible to the CPU at a specific address range. ...

The Need for a Real-Time Clock The Z80’s internal clock is only useful for instruction timing. It cannot track actual time (hours, minutes, days). A Real-Time Clock (RTC) is a separate, dedicated chip (like the DS1307 or MC146818) that contains its own crystal oscillator and often a small battery to maintain time even when the main computer is powered off. Communication: Indexed I/O The Z80 communicates with an RTC chip using a method called indexed I/O (similar to how the AY sound chip works). The RTC has a set of internal registers (e.g., 0-12) that store the seconds, minutes, hours, day, date, and control flags. ...

The Limitation of the Beeper The simple beeper (Part 28) can only play one square wave tone at a time. The AY-3-8910 (or compatible) Programmable Sound Generator is a dedicated chip that provides three independent tone channels, a noise generator, and volume control. Communicating with the AY Chip The AY chip uses a few fixed I/O ports for communication. The Z80 talks to it using a two-step process: Select Register: Write the address (0-15) of the internal register you want to modify. Write Data: Write the actual data value to that register. Generic AY Port Example: ...