Z80 Assembly 77: Interrupt-Driven Printing (Spooling Data)

The Drawback of Polling Printers are extremely slow compared to the Z80 CPU. If the main program waits for the NOT BUSY status bit (Part 76) after sending every single character, the CPU spends most of its time sitting idle, waiting for the printer to finish. The Solution: Interrupt Spooling Spooling (Simultaneous Peripheral Operations On-Line) uses interrupts to feed the printer one byte at a time in the background, allowing the main program to continue executing tasks. ...

September 28, 2025

Z80 Assembly 76: Printer I/O and Parallel Data Transfer

The Challenge of Parallel Data Transfer Unlike serial communication (sending one bit at a time, Part 40), parallel communication sends an entire byte (8 bits) simultaneously across 8 dedicated data lines. This requires additional lines for handshaking to ensure the slow peripheral (the printer) is ready to receive the data. Printer Ports on the Spectrum The ZX Spectrum often uses an external interface (like the ZX Interface 1 or Kempston printer interface) to add parallel output capability. These interfaces typically map to two adjacent I/O ports: ...

September 28, 2025

Z80 Assembly 75: Low-Level Cassette Tape I/O (Saving and Loading Data)

The Cassette I/O Challenge The ZX Spectrum does not have a dedicated tape controller chip. All tape reading and writing is achieved through software routines that precisely control the timing of a single I/O line, which is one of the most demanding tasks for the Z80 CPU. The Principle: Data is encoded using Pulse Width Modulation (PWM), where the duration of the tone (the pulse width) determines whether the CPU sends a binary ‘0’ or a binary ‘1’. ...

September 28, 2025

Z80 Assembly 72: Beeper Sound and Color Control (The FEH Port)

The Combined I/O Port: FEH The ZX Spectrum uses the same I/O port address **FEH′** for multiple output functions. When you execute an OUT (FEH), A` instruction, every bit in the Accumulator (A) controls a different piece of hardware. The Output Byte Breakdown (OUT to `FEH′): Bit Function Value (If Set) Purpose 0-2 Border Color 000B - 111B Sets the color of the screen border (0=Black, 7=White). 3 Beeper Output `08H′ Toggles the speaker (0=Off, 1=On). 4 EAR Socket `10H′ Controls the tape recorder output (used for data saving/loading). 5-7 Unused N/A Ignored by the 48K Spectrum hardware. Controlling the Beeper To produce sound, you must create a fast timing loop (Part 28) that toggles Bit 3 of the output byte. ...

September 28, 2025

Z80 Assembly 71: I/O Ports and the Keyboard Matrix Scan

The Spectrum’s Key I/O Port The ZX Spectrum is minimalistic, relying on just a few I/O ports to manage all peripherals (keyboard, display, cassette, and beeper). The Main Port: The most crucial I/O address is `FEH′ (254 decimal), which is used for both input and output control. I/O Port Decoding (The Trick) The Spectrum simplifies hardware design by only connecting I/O logic to the lowest bit (A0) and the highest byte (A8-A15) of the Z80’s 16-bit address lines. ...

September 28, 2025

Z80 Assembly 46: File I/O and SD Card Interfacing (Mass Storage)

The Challenge of Mass Storage Traditional Z80 systems used slow tape drives, but modern retro systems often use SD cards or CompactFlash for fast, reliable storage. The Z80 must communicate with these devices using a low-level protocol, typically SPI (Serial Peripheral Interface). The SPI Protocol (Simplified) SPI is a synchronous serial protocol that sends data one bit at a time over several dedicated lines controlled by I/O ports: Line Direction Purpose CLK Output The Clock signal (controls timing). MOSI Output Master Out, Slave In (Data sent from Z80 to SD card). MISO Input Master In, Slave Out (Data received by Z80 from SD card). CS Output Chip Select (Activates the specific SD card). Bit-Banging the SPI Signal Since the Z80 doesn’t have a native SPI controller, we must bit-bang the protocol entirely in software using fast I/O port writes and reads. ...

September 27, 2025

Z80 Assembly 40: Software Serial I/O (Bit-Banging Communication)

The Need for Bit-Banging The Z80 CPU does not have a built-in UART (Universal Asynchronous Receiver/Transmitter) for serial communication. To send data to a modem or another computer, we must bit-bang the signal: we use software and timing loops to manually control the state of an I/O pin. Key Components: I/O Port: A dedicated hardware output port (often the same as the beeper port) where one bit is wired to the serial output pin. Timing Loops: Precise timing loops (using T-states) to control the Baud Rate (bits per second). The Serial Data Format Serial communication sends one byte at a time, surrounded by fixed timing signals: ...

September 27, 2025

Z80 Assembly 28: Basic Sound Generation (The Beeper Port)

The Basics of Beeper Sound Many simple Z80 systems (like the ZX Spectrum) lack a dedicated sound chip and rely on a simple speaker connected to an I/O port. This speaker is known as the beeper. How Tones are Made: A tone is generated by rapidly toggling a single bit in the output port (switching the speaker ON and OFF) at a specific frequency. Frequency & Pitch: The speed of the toggling loop determines the tone’s frequency (pitch). ...

September 27, 2025

Z80 Assembly 22: Reading Keyboard Input via I/O Ports

The Keyboard Matrix Scan Unlike modern PCs, Z80 systems don’t receive ASCII codes from the keyboard. Instead, the keyboard is wired as a matrix of rows and columns. To detect a keypress, the Z80 must scan this matrix using its I/O ports. The Two-Step Process: Output (Strobe): The CPU writes a value to an I/O port to select (or “strobe”) a single row of the keyboard matrix. Input (Read): The CPU reads a value from another I/O port. The bits set to ‘1’ in the input byte indicate which keys in the selected row are currently being pressed. Example: Scanning a Single Row Let’s assume our target system uses I/O port FEH for both output (strobe) and input (read) and that the rows are addressed by setting one bit to ‘0’. ...

September 27, 2025

Z80 Assembly 12: Block I/O (INIR, OTDR) for Hardware Speed

Block I/O: The Fastest Way to Talk to Hardware The Z80 features a unique set of block I/O instructions designed to quickly move data between a memory block and a single, fixed I/O port. These are crucial for fast operations like dumping screen memory to a display controller or quickly reading keyboard buffers. The Register Setup: Block I/O relies on the following registers for definition: Register Pair Purpose in Block I/O HL Memory Address (Source or Destination) B Counter (Number of transfers to perform) C I/O Port Address (The fixed hardware port) Input Block Commands (Reading from Port) The INIR (Input, Increment, Repeat) and INDR (Input, Decrement, Repeat) commands read data from the port specified by C and store it into memory pointed to by HL. ...

September 27, 2025