Z80 Assembly 60: Interrupt Vector Table Management (IM 2 Dynamic Handlers)

The Interrupt Vector Table (IVT) The Interrupt Vector Table (IVT) is a critical data structure used exclusively when the Z80 is operating in Interrupt Mode 2 (IM 2). It is a simple array of 16-bit addresses that tells the CPU exactly where to jump when a specific hardware device signals an interrupt. How the IVT Address is Calculated: Base Address: The OS sets the Interrupt Vector Register (I) to point to the base (high byte) of the IVT. Hardware Vector: The interrupting hardware places an 8-bit value (the low byte of the address) on the data bus. Final Address: The Z80 combines the I register (High Byte) with the Hardware Vector (Low Byte) to form the 16-bit address of the IVT entry. Jump: The CPU reads the 16-bit address stored at the IVT entry and jumps to the device’s specific Interrupt Service Routine (ISR). Structuring the IVT The IVT must be aligned to a 256-byte boundary (e.g., C000H′, D000H′) and consists of 128 consecutive 16-bit addresses (256 bytes). ...

September 27, 2025

Z80 Assembly 59: Console Output (Rendering Text to the Screen)

The Challenge of Text Output Displaying a single ASCII character (A′, 5′, `!′) requires the OS to perform several complex steps: Cursor Management: Find the current screen position (X, Y) where the character should appear. Font Lookup: Find the graphic pattern (the 8x8 pixel data) for that character. Drawing: Copy the font pattern onto the screen memory (Part 23). Advance Cursor: Move the cursor position to the next character cell (X+1). The PutChar Routine (System Call) Every OS provides a core routine, often called `PutChar′, which is the system call used by programs to print a single character. ...

September 27, 2025

Z80 Assembly 58: Interrupt-Driven Keyboard Handling

The Drawback of Main Loop Polling In simple programs, checking the keyboard (`IN′ instruction) is done within the main program loop. This is inefficient because the CPU spends valuable time polling the keyboard even when no key is pressed, slowing down the main application. The Solution: Timer-Driven Interrupts A robust operating system uses a fixed-rate timer interrupt (e.g., 50 or 60 times per second) to trigger the keyboard scan routine. This ensures the keyboard is checked reliably without interfering with the main application’s logic. ...

September 27, 2025

Z80 Assembly 57: Disk and File System Access (Sectors, Tracks, and FAT)

The Challenge of Physical Storage When a user program requests to open a file (e.g., MYFILE.BIN), the OS kernel must translate that name into a list of physical disk addresses (sectors) where the data is stored. Key Disk Terminology: Track: A concentric ring on the disk where data is stored. Sector: A small, fixed-size block of data (e.g., 512 bytes) that lives on a track. Directory: A list of file names, sizes, and the starting sector number for each file. The File Allocation Table (FAT) The File Allocation Table (FAT) is the core data structure that links a file’s starting sector to all the subsequent sectors that make up the file. ...

September 27, 2025

Z80 Assembly 56: Error Handling and System Traps (Preventing Crashes)

The Need for Error Trapping In an operating system, a single unexpected event—such as a user program attempting to execute an illegal opcode or writing to protected memory—can lead to a total system crash. Error Trapping is the mechanism the OS uses to catch these faults and recover gracefully. Trapping Illegal Instructions The Z80 itself does not automatically trap illegal opcodes (machine code bytes that don’t correspond to any instruction). Executing an illegal opcode usually results in unpredictable behavior or a very slow, unintended operation. ...

September 27, 2025

Z80 Assembly 55: Memory Mapping and Allocation (Keeping RAM Organized)

The Challenge of Fragmented Memory In a simple Z80 OS, as programs are loaded and unloaded, the $64$ KB of RAM becomes fragmented (broken into small pieces of free and used memory). The OS kernel must have a fast way to find a contiguous block of free memory when a new program needs to be loaded. The Free List (Simple Allocation) The most common technique is the Free List, a simple linked list (Part 33) that tracks all available blocks of memory. ...

September 27, 2025

Z80 Assembly 54: Process Scheduling and Cooperative Multitasking

The Challenge of Multitasking The Z80 is a single-core processor; it can only execute one instruction at a time. Multitasking is the technique of quickly switching the CPU’s attention between several active programs (processes), making it appear as though they are all running simultaneously. Cooperative Multitasking (The Z80 Standard) The simplest and most common form of multitasking on an 8-bit OS is Cooperative Multitasking. The Principle: The CPU runs a program until that program voluntarily yields (gives up control) back to the OS scheduler. ...

September 27, 2025

Z80 Assembly 53: Loading and Executing User Programs

The Role of the Loader In a simple Z80 operating system, the loader is the kernel routine responsible for two primary tasks: Allocate Memory: Determine a safe, unused area of RAM for the user program. Transfer Code: Read the program’s machine code from the storage device (or RAM buffer) into the allocated space. Execute: Start the user program. The Program Loading Routine (Simplified) This routine assumes the program’s starting address and size are known (e.g., read from a file header). ...

September 27, 2025

Z80 Assembly 52: Building a Simple OS - The Boot Sequence

The Kernel’s Entry Point Every Z80 system, upon power-on or reset, immediately begins executing the instruction at a fixed, low memory address. This is the boot sequence start, and it usually resides in Read-Only Memory (ROM). Common Reset Vector: The Z80 automatically jumps to address 0000H (the Reset Vector). The instruction at this address must be a jump to the main ROM code. Phase 1: Minimal Hardware Initialization The first few instructions of the kernel must perform critical tasks to ensure the CPU can safely run code. ...

September 27, 2025